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NAND cell structure

NAND cell structure

It is amazing that after so many years of development and efforts and great presentations we are still not in a full production and still basic R as well as EDA still in infancy.

It is amazing that after so many years of development and efforts and great presentations we are still not in a full production and still basic R as well as EDA still in infancy.

SEMICON West 2012 exhibits preview: Lithography focus - ElectroIQ

SEMICON West 2012 exhibits preview: Lithography focus - ElectroIQ

"Moore's Law Dead by 2022" - Then, Before or .... ? The following chart from Samsung clearly illustrates this dynamics for NAND, but from the above discussion it may be even more true for SoC.

"Moore's Law Dead by 2022" - Then, Before or .... ? The following chart from Samsung clearly illustrates this dynamics for NAND, but from the above discussion it may be even more true for SoC.

IEDM 2012 - The Pivotal Point for Monolithic 3D IC, http://www.monolithic3d.com/2/post/2013/01/iedm-2012-the-pivotal-point-for-monolithic-3d-ic.html#

IEDM 2012 - The Pivotal Point for Monolithic 3D IC, http://www.monolithic3d.com/2/post/2013/01/iedm-2012-the-pivotal-point-for-monolithic-3d-ic.html#

"Continuous Innovation Enables Continuation of Moore's Law" explained in this blog piece:   http://www.monolithic3d.com/2/post/2012/06/is-the-cost-reduction-associated-with-scaling-over.html

"Continuous Innovation Enables Continuation of Moore's Law" explained in this blog piece: http://www.monolithic3d.com/2/post/2012/06/is-the-cost-reduction-associated-with-scaling-over.html

The most common area that you asked us was about low temperature (less than 400°C) bonding and low temperature cleaving processes

The most common area that you asked us was about low temperature (less than 400°C) bonding and low temperature cleaving processes

The monolithic 3D IC technology is applied to produce monolithically stacked high performance High-k Metal Gate (HKMG) devices, the world’s most advanced production transistors.

The monolithic 3D IC technology is applied to produce monolithically stacked high performance High-k Metal Gate (HKMG) devices, the world’s most advanced production transistors.

Recently I read a very uncommon report title: "NVIDIA deeply unhappy with TSMC, claims 20nm essentially worthless". Quoting directly: “One of the unspoken rules of customer-foundry relations is that you virtually never see the former speak poorly of the latter. Only when things have seriously hit the fan do partners like AMD or NVIDIA admit to manufacturing problems... That’s why we were surprised - and our source testified to being stunned"

Recently I read a very uncommon report title: "NVIDIA deeply unhappy with TSMC, claims 20nm essentially worthless". Quoting directly: “One of the unspoken rules of customer-foundry relations is that you virtually never see the former speak poorly of the latter. Only when things have seriously hit the fan do partners like AMD or NVIDIA admit to manufacturing problems... That’s why we were surprised - and our source testified to being stunned"

Last time we discussed three-dimensional FPGAs, it became clear that there are two major areas that block wider acceptance of current 2D FPGAs: their relative inefficiency in area (i.e., cost) power and performance as compared to ASICs, and the limited number of sizes that are offered by vendors due to the high cost associated with each family member.

Last time we discussed three-dimensional FPGAs, it became clear that there are two major areas that block wider acceptance of current 2D FPGAs: their relative inefficiency in area (i.e., cost) power and performance as compared to ASICs, and the limited number of sizes that are offered by vendors due to the high cost associated with each family member.

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