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Recently I read a very uncommon report title: "NVIDIA deeply unhappy with TSMC, claims 20nm essentially worthless". Quoting directly: “One of the unspoken rules of customer-foundry relations is that you virtually never see the former speak poorly of the latter. Only when things have seriously hit the fan do partners like AMD or NVIDIA admit to manufacturing problems... That’s why we were surprised - and our source testified to being stunned"

Recently I read a very uncommon report title: "NVIDIA deeply unhappy with TSMC, claims 20nm essentially worthless". Quoting directly: “One of the unspoken rules of customer-foundry relations is that you virtually never see the former speak poorly of the latter. Only when things have seriously hit the fan do partners like AMD or NVIDIA admit to manufacturing problems... That’s why we were surprised - and our source testified to being stunned"

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It is amazing that after so many years of development and efforts and great presentations we are still not in a full production and still basic R as well as EDA still in infancy.

It is amazing that after so many years of development and efforts and great presentations we are still not in a full production and still basic R as well as EDA still in infancy.

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SEMICON West 2012 exhibits preview: Lithography focus - ElectroIQ

SEMICON West 2012 exhibits preview: Lithography focus - ElectroIQ

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NAND cell structure

NAND cell structure

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IntSim is an open-source CAD tool to simulate 2D and 3D-ICs.

IntSim is an open-source CAD tool to simulate 2D and 3D-ICs.

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Zvi Or-Bach, CEO of MonolithIC 3D Inc., selected as Finalist for EETimes’ Innovator of the Year Award. In recognition of his contributions to monolithic 3D-ICs.

Zvi Or-Bach, CEO of MonolithIC 3D Inc., selected as Finalist for EETimes’ Innovator of the Year Award. In recognition of his contributions to monolithic 3D-ICs.

MonolithIC 3D Inc. Issued Patents on 3D FPGAs and 3D Memories

MonolithIC 3D Inc. Issued Patents on 3D FPGAs and 3D Memories

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Last time we discussed three-dimensional FPGAs, it became clear that there are two major areas that block wider acceptance of current 2D FPGAs: their relative inefficiency in area (i.e., cost) power and performance as compared to ASICs, and the limited number of sizes that are offered by vendors due to the high cost associated with each family member.

Last time we discussed three-dimensional FPGAs, it became clear that there are two major areas that block wider acceptance of current 2D FPGAs: their relative inefficiency in area (i.e., cost) power and performance as compared to ASICs, and the limited number of sizes that are offered by vendors due to the high cost associated with each family member.

The Future is the Interconnect: IITC

The Future is the Interconnect: IITC

The most common area that you asked us was about low temperature (less than 400°C) bonding and low temperature cleaving processes

The most common area that you asked us was about low temperature (less than 400°C) bonding and low temperature cleaving processes

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